Learn More About the Polaris Architecture

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Hi, Radeon fans! Over the past few months you’ve undoubtedly learned quite a lot about the Polaris architecture, but we also know many of you have a boundless appetite for deeper technical detail. If you’re one of those PC enthusiasts, today’s updates will be pretty interesting for you!

First, we’re officially publishing the Polaris architecture whitepaper. This is our bible for everything that’s new, interesting, or different in the 4th-gen Graphics Core Next ISA and all the partner silicon—like media encoding or display controllers—in the Radeon™ RX 400 Series GPUs. Here’s an excerpt to whet your appetite:

Every flip-flop has a clock input, data input, data storage, and data output. The clock input triggers the flip-flop to transit its stored data to the output and receive new data from the input. A clock network runs throughout the entire chip, distributing clock signals that synchronize operation. In active operation, the clock network typically consumes around 20-35% of the total power of a Polaris-based graphics chip.


Next, we’ve heard from many on Reddit and Twitter that you are interested in obtaining a copy of the presentation we developed to explain the various features and benefits of the Polaris architecture. We’re making that available today as well.

As an example, this presentation can help you learn more about a technology we call adaptive clocking. Adaptive clocking is an AMD-built power efficiency booster that allows for higher out-of-the-box clockspeeds via nanosecond-fast compensation for transient voltage drops that accompany changes in shader workloads. There are many more technologies besides, so this presentation will certainly make for some fascinating reading for those of you that want to know more about how Radeon GPUs are built.

DOWNLOAD: Polaris Architecture whitepaper
DOWNLOAD: Polaris Architecture technical presentation


10 thoughts on “Learn More About the Polaris Architecture

  1. Questions I’ve never seen answered is why GF rather than TSMC? My guy feeling says price not performance otherwise we’d likely see Nvidia on 14nm as well.

  2. Had already seen the presentation elsewhere online. Still, nothing like seeing ol’ Raja’s super secret cigar stash again!

    1. i think it is absolutely sufficient when tessellation is used to improve mesh quality in a distinguishable and reasonable way. There is only so much need for tessellation on given screen resolutions today. No need to support higher tessellation performance just for bad use cases or bench-marking.

  3. Overall the developments in tech looks promising at leas on paper. In case of Adaptive Frequency and Voltage Scaling (AVFS) it was odd to see the reviews on reference designs of the RX400 series didn’t show differences among test samples or advantages of this tech. One wonders whether AVFS is disabled when the user manipulates the power targets. Shouldn’t it rather be a freq-target where AVFS automatically sets optimum voltage then to reach a specified goal?

  4. About memory performance – the new DCC and L2-Cache are stressed in these papers a lot and how this is better with Polaris – hence no need for bigger memory interfaces. However in many reviews of first Polaris based graphic cards the architecture looks bottle necked on memory bandwidth. I wonder if this new DCC and new L2 caches require patches per each game individually or if AMD can improve things via drivers. It is odd to see R9 390s outperforming a RX480 in selected games, while on paper this should not be the case.

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